1. Field of the Invention
The present invention relates to a nonvolatile memory device and a method for manufacturing the same.
2. Background Art
Nonvolatile memory typified by NAND flash memory is used widely for large-capacity data storage in mobile telephones, digital still cameras, USB memory, silicon audio, and the like. The market continues to grow due to the reduction of manufacturing costs per bit enabled by rapid downsizing. However, NAND flash memory utilizes a transistor operation that records information using a threshold shift. It is considered that improvements to uniformity of characteristics, reliability, higher-speed operations, and higher bit density will reach a limit. The development of a new nonvolatile memory is desirable.
On the other hand, for example, phase change memory or variable resistance memory operates by utilizing a variable resistance state of a resistive material. Therefore, a transistor operation is unnecessary during writing/erasing, and the element characteristics improve as the size of the resistive material is reduced. Hence, this technology is expected to respond to future needs by realizing highly uniform characteristics, higher reliability, higher-speed operations, and higher bit density.
A variable resistance memory is different from conventional NAND flash memory in that sensing is performed by a current amount. To this end, a rectifying element (diode) is provided in each memory cell to regulate the direction of the current flowing in a memory layer having a variable resistance state.
The rectifying element is normally formed by a PIN diode having good affinity with silicon devices. However, the following problems occur. It is necessary to form polycrystalline silicon, for example, having three portions of a p-type, a non-doped (intrinsic semiconductor) type, and an n-type. It is also necessary to activate impurities, and therefore the number of process steps increases. Increasing the layer thickness of the non-doped layer to secure the breakdown voltage increases the overall thickness to increase and the differences in levels between cell portion and peripheral circuit portion; and manufacturing becomes difficult. Further, the impurity profile in the PIN layer readily changes during thermal steps after formation of the PIN layer, making it difficult to provide uniform characteristics of PIN diodes in each layer of a stacked nonvolatile memory device. The constraints of the heating steps when forming the PIN diode result in constraints on materials that can be used as wirings. Also, subsequent oxidation processing to remove damage after processing the PIN diode causes oxidation of the wirings and barrier metal, resulting in performance deterioration. In comparison with a Schottky junction, in which majority carriers carry the current, a PIN diode uses a PN junction, in which mainly minority carriers carry the current. Therefore, it is difficult to obtain the necessary operation current for writing and erasing a variable resistance memory, accordingly resulting in elements overheat due to Joule heat. Thus, various problems occur when using a PIN diode as the rectifying element.
JP-A 2005-522045 (Kohyo) discusses technology related to a phase change memory device including a variable resistance element that store information as a resistance value determined by a crystalline phase change and a Schottky diode. However, materials forming the Schottky diode are not examined; and by conventional art, for example, materials of the rectifying element and materials of the memory layer may react to cause, for example, deterioration of characteristics of the rectifying element and/or the memory layer; and integration of the rectifying element and the memory layer is difficult. Further, materials of the rectifying element may react with each other, causing deterioration of characteristics of the rectifying element. Additionally, for a stacked nonvolatile memory device, the manufacturing step history is different for each of the layers stacked on one another, and therefore the manufacturing step history is different for the rectifying elements of each layer. Therefore, for example, differences in thermal histories may result in different characteristics among layers of rectifying elements, and uniform rectifying properties cannot be obtained.